Infra-red image detectors, e.g. for use in night vision equipment, have been constructed using a number of technologies and circuit techniques. Such detectors comprise an array of infra-red sensitive elements coupled to image processing circuitry, the assembly being fabricated on a common silicon substrate. The detectors employ a cyclic integration technique in which the photo current from each photo diode element is stored in a respective integrating capacitor during each integration cycle. At the end of the cycle, the capacitor is discharged or reset ready for the next cycle. The technologies employed in constructing these detectors include the use of charge coupled devices (CCD) which use a linear array of potential wells in a silicon substrate to store image induced charge. Further CMOS and bipolar technologies employ integrated circuit capacitors for charge storage.
The technique of time delay integration (TDI) has been introduced by a number of workers and has the advantage that it provides a reduction in detector noise by a factor of .sqroot.n where n is the number of stages in the TDI chain. This is of importance in the detection and processing of infra red signals.
A particular problem with infra-red imaging circuitry is that of power dissipation. In order to reduce background noise, the detector is cooled, typically to the temperature of liquid nitrogen. It will be appreciated that the heating of the circuitry resulting from any excessive power dissipation will impair or negate the effects of cooling. Many workers have employed CMOS technologies for the implementation of TDI read-out arrays. However, the unity gain amplifiers needed to transfer the stored integration charge from one TDI stage to the next suffers from two problems. Firstly, each amplifier consumes power which, for a large array, results in excessive power dissipation. Secondly, CMOS amplifiers are inherently noisy at low frequencies and this reduces the effectiveness of the TDI technique. For this reason, various workers have investigated bipolar techniques.
The most commonly used bipolar detectors employ an analogue shift register technique which is generally referred to as a bucket brigade delay line. Such a technique is described by F L J Sangster et al. in IEEE Journal of Solid State Physics, Vol. SC-4, No. 3, June 1969, pp 131-136, and by G Krause in Electronics Letters, December 1967, Vol. 3, No. 12, pp 544-546. Circuits of this type comprise a master and slave arrangement for each stage and use a two-phase clock for transferring charge between the master and slave circuits at each stage. While the use of bipolar circuitry significantly reduces the problem of electrical noise, the conventional bucket brigade arrangement suffers from two key limitations. Firstly, the dynamic range of the circuit is limited to about one half of the supply voltage which, for current bipolar processes, is about 2.5 volts. This is because the clocking process causes both terminals of each charge storage capacitor to rise in voltage by an amount equal to the sum of the maximum stored voltage and the bipolar transistor threshold voltage V.sub.be. Further, the maximum voltage to which the circuit can be subjected is limited by the reverse breakdown voltage of the bipolar emitter/base junctions. Secondly, the resetting of the charge storage capacitors requires additional circuitry and cycle time for each stage.